Recently, it is demanded that wireless communication terminals, such as cellular phones, correspond to a plurality of communication standards. Multimode high frequency integrated circuits (RFIC: Radio Frequency Integrated Circuits) have been developed. The multimode RFICs correspond, for example, to GSM (registered trademark) (Global System for Mobile Communications), EDGE (Enhanced Data Rates for GSM Evolution), WCDMA (registered trademark) (Wideband Code Division Multiple Access), and LTE (registered trademark) (Long Term Evolution).
In the multimode RFIC, it is necessary to mount a circuit corresponding to an RF signal of a plurality of frequency bands. This causes a problem of increasing the circuit area. If it is intended to correspond to reception carrier aggregation and reception diversity, reception paths of a plurality of systems are necessary, thus causing another serious problem of increasing the circuit area.
A technique disclosed in Japanese Unexamined Patent Publication No. 2009-10461 is known as a method for reducing the circuit area of the RFIC. According to the technique of this literature, an inductor for degeneration and a load inductor are shared between a plurality of low noise amplifiers (LNA) corresponding respectively to a plurality of reception frequency bands.
However, as the number of LNAs sharing the load inductor increases, the effect of the parasitic capacitance accompanying with an output side of the LNAs increases. A problem is that the gain of the LNAs and the noise characteristic decrease, due to an effect of the parasitic capacitance. Thus, in the related art, the number of LNAs sharing the load inductor is limited. Therefore, the circuit area is hardly reduced.
Other objects and new features will be apparent from the descriptions of the present specification and accompanying drawings.